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AbsInt Oct 21, 2026 - Oct 21, 2026

Safety-Critical Software Verification with AbsInt: MIL-STD-882E, DO-178C & ISO 26262.

Join JORAL Technologies in Ottawa, Canada for an in-person technical workshop focused on MIL-STD-882E, DO-178C, and ISO 26262, and how static analysis and verification tools can support software safety, assurance, and compliance activities across defense, aerospace, and automotive applications led by the AbsInt Team.Discover how AbsInt tools including Astrée, StackAnalyzer, and aiT can help detect potential runtime errors, verify coding rules, analyze worst-case stack usage, and determine worst-case execution time (WCET). Learn how these capabilities can reduce manual verification effort and provide objective evidence to support safety and verification activities associated with MIL-STD-882E, DO-178C, and ISO 26262.The session will also explore how static analysis fits into the broader safety-critical software development lifecycle helping engineering teams identify risks earlier, improve software quality, strengthen verification, and build supporting evidence for safety assessment, certification, and compliance.

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AbsInt Oct 20, 2026 - Oct 20, 2026

AbsInt Static Analysis Tools to Verify AI-Assisted Code for ISO 26262, DO-178C, IEC 61508 & IEC 62304 Compliance

Join JORAL Technologies in Toronto, Canada, on Tuesday, October 20th from 9:00am-12:00pm for an exclusive 3-hour interactive workshop led by the AbsInt Team Discover how AbsInt Static Analysis Tools help verify AI-assisted code while supporting compliance with ISO 26262, DO-178C, IEC 61508, and IEC 62304. Through technical presentations and live demonstrations, you'll learn how to integrate sound static analysis into modern development workflows, improve software quality, ensure memory safety, and confidently support safety certification.Whether you're developing AI-assisted or safety-critical embedded software, this workshop will provide practical techniques you can apply immediately. Seats are limited.

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LATEST PAST EVENTS

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AbsInt Sep 25, 2025 - Sep 25, 2025

Unlocking Static Analysis

Join us for a deep technical dive with Daniel Kästner, CTO and Co-Founder of AbsInt. This hand-on session focuses on current software development challenges and the contributions of static analysis in addressing those challenges. The topics we highlight include satisfying increasingly strict cybersecurity and safety requirements, software development with highly automated DevOps pipelines, and programming with AI copilots. Whether you're just starting with static analysis or working on certification-driven projects, this session will give you practical insights into satisfying evolving safety and security requirements and making your code more robust, analyzable, and compliant.

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AbsInt Nov 25, 2025 - Nov 25, 2025

Webinar: AMC/AC 20-193: Certification of Avionics Software Running on Multi-Core Processors (MCPs).

Tuesday November 25th 2025 11:00am EST - 12:00pm EST Microsoft TEAMSThis webinar focuses on timing verification with an emphasis on worst-case execution time analysis. Participants will learn about established and emerging techniques for timing verification, including measurement-based and analysis-based methods, and how processor characteristics such as hardware speculation and shared resource interference affect predictability. Special attention will be given to timing challenges on modern multi-core platforms and to the latest certification guidance from FAA AC 20-193 and EASA AMC 20-193.

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AbsInt Jun 18, 2025 - Jun 18, 2025

Webinar: NXP i.MX93: Revealing the True Power of Arm Cortex-A55 Processor

VIEW RECORDING HERE Topics: - NXP i.MX. MX93: Revealing the True Power of the ARM Cortex-A55 Processor. - ARM DS Development Tools - Correlium Virtual Platform The i.MX93 processors are the first in the i.MX lineup to feature the scalable Arm Cortex-A55 core — a power-efficient, mid-range CPU built on Arm DynamIQ technology. With Armv8-A architecture and dedicated machine learning instructions, the Cortex-A55 delivers an optimal balance of performance and efficiency. It can be used as a standalone core or paired with Cortex-A7x in a big.LITTLE configuration. This webinar explores the architecture and capabilities of Cortex-A55, highlighting how it differs from earlier low-power cores like the Cortex-A53, using i.MX93 as a case study. It’s ideal for anyone designing a new SoC or evaluating off-the-shelf options from vendors like NXP, Renesas, or MediaTek. Agenda: - Introduction to i.MX93 Architecture - Why Cortex-A55? - What is the Dynamic Shared Unit (DSU) - Cache Behavior & Cache Coherency in Cortex-A55 - New Virtualization and Security Features - How to Start? Correlium Virtual Platform Hardware, Arm Development Studio Tools Arm DS IDE Debugging on Corellium Atlas - Q & A Speaker:Mr. Hollander is ARM, security for embedded systems, and FPGA expert with more than 20 years of experience in the industry as developer, consultant and trainer. Hollander trains top notch customers such as Apple, Samsung, Marvell, Intel, Microsoft, Broadcom, Infineon, Nvidia, NXP, secret agencies and military to name a few. Mr. Yamada has 15 years of technical experience in supporting and building automation frameworks, now with an emphasis in Corellium architecture If you have any questions, please reach out to Alice Campbell Email: alice.campbell@joraltechnologies.com Phone: 613-215-3252

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